1. Field of the Invention
The present invention relates to a system and method for translating a high-level programming language (HLL) code, such as C, C++, Fortran, Java, etc., into Hardware Description Languages (HDL) code such as Verilog or VHDL. More particularly, the present invention relates to a system and method for translating high-level language codes into HDL codes by using a HDL backend attached to the main compiler (i.e. compilers for HLLs). The HDL code is then synthesized to cooperate with a main core to accelerate applications. Also, this invention presents innovative and novel techniques to support seamless cross calls between software code running on the main core and hardware code in a dedicated hardware, and even recursive calls inside the hardware.
2. Description of the Related Art
Digital circuit designs have been greatly evolved over the past few decades due to the fast development of semiconductor fabrication technology. At an initial stage, only a few number of logic gates were integrated on one chip, and it is called SSI (Small Scale Integration). The constant development of the technology has led us an era of MSI (Medium Scale Integration) having hundreds of logic gates integrated on one chip, LSI (Large Scale Integration) having thousands of logic gates, and to VLSI (Very Large Scale Integration) having much more than the LSI complexity. Therefore, it becomes more and more popular to use multiple VLSI chips, such as general-purpose processors, DSPs, and ASICs in one design platform.
Programming languages such as Fortran, Pascal, C and the like have been used to develop computer programs for a long time. Similarly, digital circuit designers have felt the necessity of a standardized language to describe digital circuits, which results in HDL (Hardware Description Language). HDL can describe a concurrent procedure corresponding to hardware characteristics and may be represented by Verilog HDL and VHDL. Verilog HDL and VHDL started from Gateway Design Automation and DARPA (Defense Advanced Research Projects Agency), respectively. The digital circuit designers use the HDL for developing digital systems. And the developed HDL codes are synthesized by HDL compilers.
Nowadays many system developers have convincing reasons to add FPGA (Field Programmable Gate Array) to their design platform, and often replace traditional general-purpose processors or DSPs with FPGAs due to its significant computational performance per watt over microprocessors and its design flexibility over ASICs. However, the task of configuring FPGAs with description of HDL requires substantial amount of knowledge in hardware design methods, which makes the potential advantages of the FPGA computing unrealizable to most software developers. Therefore, there is increasing demand for designing hardware at a higher abstraction level such as high-level programming languages without being concerned about hardware-specific details. This approach requires a translation tool that generates the HDL codes from commonly used high-level programming languages (HLL) in software development.
For the purpose of overcoming such a problem, there are many previous researches about tools or methods of translating software programming languages into HDL codes. However, there is a great difference between the programming concepts of hardware and software in translating high-level programming language codes into HDL codes and so it is very difficult to express all software language syntaxes, such as pointers, complex data types (like a structure of a structure, and union in C), two dimensional arrays and so on, in HDL languages. As a result, the currently available conventional tools or methods have many limitations in use. They can support only the translation from system level language codes, such as SystemC, SA-C, Streams-C and the like, into HDL codes, or translation from subsets of high-level languages into HDL with some extension for hardware control.
Moreover, the difference in code generation for hardware and software disallow us to support a cross call between hardware and software, and recursive calls inside hardware. Due to the fact, we should carefully develop an interface code between hardware and software.